The present invention relates to gate drivers, in particular, to gate drivers having dead-time insertion to prevent simultaneous conduction of two switches connected in a half bridge configuration. In particular, the present invention relates to a gate driver integrated circuit with programmable dead-time insertion.
Conventional methods that integrate a programmable dead-time generation circuit in an integrated circuit generally use a resistor external to the integrated circuit to set the amount of dead-time by, for example, setting an internal current reference to generate the dead-time. This is shown for example in FIG. 1 where the resistance R sets the dead-time generated by the dead-time generation circuit in the gate driver integrated circuit.
The conventional method of dead-time setting has the following disadvantages:
1. Because of the direct relationship between the external component value and the amount of the dead-time, this method is inherently prone to noise injection from the dead-time setting terminal of the integrated circuit. This is shown in FIG. 3 which shows a graph of dead-time versus input voltage in the conventional programmable dead-time circuit using a resistance connected to the dead-time terminal DT of the integrated circuit of FIG. 1.
2. The amount of dead-time is determined by both internal and external components, which have independent individual variations. Therefore, in order to ensure dead-time for shoot-through prevention purposes, it is hard to achieve precise dead-time values.
3. Internal and external circuits which determine the dead-time tend to have different temperature coefficients. The performance of the amplifier can be unstable with temperature change and/or it might go into thermal runaway if it gets into the shoot through region.
These problems become serious when the application needs a narrow dead-time, such as less than 100 nanoseconds for higher output linearity, for example, in Class D audio amplifiers.